Differential comparators are often used to detect differential signals and to compare the detected quantity to some predefined threshold. Conventional differential comparators generally employ a multi-stage differential construction 20, as shown in FIG. 1. The stages correspond to a methodology of first detecting the differential voltage, then comparing the detected voltage to a reference voltage. The first stage, or input stage, comprises a differential amplifier 22 that includes respective differential inputs V2 and V1 and produces an output voltage (V2-V1) proportional to the detected difference signal. The output is fed for comparison as an input to a second stage, or threshold stage, that includes a differential amplifier 24 for comparison to a reference voltage Vref at a second input of the second stage. While the multi-stage configuration works well for its intended low performance applications, at high data rates the multi-stage structure generally becomes overly susceptible to a signal inaccuracy known as dispersion.
Dispersion is often recognized by those skilled in the art as the change in response time, or change in propagation delay, between the input and output of an electronic device. In contrast to a fixed propagation delay that can be measured, predicted and repeatedly calibrated out of a measurement with high accuracy, a changing propagation delay creates prediction inaccuracies with signal timings that may undesirably affect the overall measurement accuracy of the comparator. Typically, dispersion varies as a complex function of threshold signal level, frequency, and temperature.
What is needed and heretofore unavailable is a differential comparator that minimizes the effects of dispersion. The need also exists for the implementation of such a comparator in the pin electronics of a semiconductor tester to maximize accuracy and performance. The differential comparator of the present invention satisfies these needs.